Prototypes

Math-Pro, Falkon, ViBram

Patents

1. Panthagani Vijayababu, Sonal Yadav, and Vijay Holimath, “Integration of RacEr GPGPU FPGA with Wolfram Mathematica for High-Performance Computing,” Indian Patent No. 598722, Date of filing May 09, 2025. (Utility Patent —Granted)

2. Panthagani Vijayababu, Sonal Yadav, Vijay Holimath, "System and Method for Transparent Accelerator Invocation through Runtime Operator Overloading in Symbolic Computation Environments," Indian Patent, The Patent Office Journal No.  10/2026 Dated 06/03/2026 page no. 26701. (Utility Patent)

3. Panthagani Vijayababu, Sonal Yadav, Vijay Holimath, "System and Method for Kernel-Based Hardware Acceleration of Symbolic Computation," Indian Patent, The Patent Office Journal No.  09/2026 Dated 27/02/2026 page no. 24390. (Utility Patent)

Text Book

Sonal Yadav, Computer System Organization, published by All India Council for Technical Education (AICTE), Feb 2024. ISBN: 978-93-6027-498-8 (English) ISBN: 978-93-6027-113-8 (Gujarati), ISBN:  978-93-6027-066-7 (Marathi). Free to download from AICTE e-KUMBH (aicte-india.org)

Book Chapter

Sonal Yadav, Ayu Yaduvanshi, Shashank Shekhar, Lokesh Bansal, Prateek Meena, and Amit Kumar. "An Intelligent Interview Bot for Candidate Assessment by Using Facial Expression Recognition and Speech Recognition System." Computational Statistical Methodologies and Modeling for Artificial Intelligence (2023): 142-160.

Journal and Conference Publications

• Aditi Bajpai, Sonal Yadav, Naresh K. Nagwani, "HiEn-TriDistillIE: Three-Step Interleaved Multi-Teacher Distillation for Hindi–English Medical NER and Coarse Relation Extraction", ACM Transactions on Asian and Low-Resource Language Information Processing, 2026. (Under Revision)
• Shani Verma, Naresh K. Nagwani, Sonal Yadav, "A Study on Hybrid Graph Neural Network based Approach for Link Prediction", Data Technologies and Applications, Sept. 2026. (Q2, SCIE)
• Panthagani VijayaBabu, Sonal Yadav, Vijay Holimath, ''Offloading Wolfram Mathematica Computations to RacEr a RISC-V Based FPGA GPGPU,” 29th IEEE Computer Society Annual Symposium on VLSI (ISVLSI) July 07-10, 2026, Kolkata, India. (CORE Rank:B)
• Aditi Bajpai, Sonal Yadav, Naresh K. Nagwani, "When Finance Meets Artificial Intelligence: Transforming Financial Text Named Entity Recognition with the Incorporation of Hybrid Embeddings", South Asian Journal of Business Studies, 1-34, April 2026. (Q1, Scopus)
• Prajakta Dere, Mahendra Gaikwad, Sonal Yadav. High-Performance Low-Power Inter- and Intra-Cluster CDQ-Routing for Cluster Diagonal Mesh. IETE Journal of Research, pp. 1–21, 2025. https://doi.org/10.1080/03772063.2025.2510520 (Q2, SCIE)
• Aditi Bajpai, Sonal Yadav, Naresh K. Nagwani, "An Extensive Bibliometric Analysis of Artificial Intelligence techniques from 2013 to 2023", Journal of Supercomputing, Springer Nature, 2025.  (Q2, SCI)
• Shilpi Chaubey, Sonal Yadav, Vijay Holimath, "Bridging MATLAB and PYNQ-Z2 Board for Edge Detection Applications", 4th OPJU International Technology Conference (OTCON) on Smart Computing for Innovation and Advancement in Industry 5.0, IEEE, Feb 2025. 
• Aditi Bajpai, Sonal Yadav, Naresh K. Nagwani, "A Fine-Grained Parts-of-Speech tagging for Hindi-Devanagari Script based on Deep Learning", 4th OPJU International Technology Conference (OTCON) on Smart Computing for Innovation and Advancement in Industry 5.0, IEEE, Feb 2025. (Best Paper Award)
• Panthagani Vijaya Babu, Sonal Yadav, Vijay Holimath, "Advancing Healthcare with GPGPU and Energy-Efficient NoC Architectures: A Comprehensive Survey", International Conference on Ambient Intelligence in Health Care, IEEE,  Jan 2025.  
• Shashank Singh, Veena Anand, and Sonal Yadav, “Trust Based Clustering and Routing in WSNs Using DST-WOA” Peer-to-Peer Networking and Applications, Springer 2024. (Q2, SCI)
• Sonal Yadav, Amit Kumar, Ayu Yaduvanshi, Prateek Meena, A Review of Feature Extraction and Classification Techniques in Speech Recognition, SN Computer Science, 2023. (Q2, Scopus)
• Perika Puneeth, Ajay Singh Raghuvanshi, Sonal Yadav, Design and Implementation of High Frequency 16-bit full adder on FPGA Families, 4th IEEE International Conference of Emerging Technologies, Belgaum, India, 2023. 
• Mursina Khatun, Ajay Singh Raghuvanshi, Sonal Yadav, “Comparative Analysis of Hybrid Adders with Different Technology Nodes using Cadence Virtuoso,” Fifth International Conference on Electrical, Computer and Communication Technologies, IEEE, Tamilnadu, India, 2023. DOI:10.1109/ICECCT56650.2023.10179843
  
• Sonal Yadav, Vijay Laxmi, Hemangee K. Kapoor, Manoj Singh Gaur, Amit Kumar, “Adaptive Distribution of Control Messages for Improving Bandwidth Utilisation in Multiple NoC,” Journal of Supercomputing, Springer Nature, 2023. (Q2, SCI)
• Amit Kumar, Aparajita Ojha, Sonal Yadav, Anupam Kumar, “Real-Time Interception Performance Evaluation of Certain Proportional Navigation based Guidance Laws in Aerial Ground Engagement,” Intelligent Service Robotics (ISR), Springer-Nature, 2022. https://doi.org/10.1007/s11370-021-00404-4 (Q1, SCI)
• Amit Kumar, Shashwat Singh, Vibhor Rawal, Shivam Garg, Anand Agrawal, Sonal Yadav, “CNN-based device-free health monitoring and prediction system using WiFi signals”, International Journal of Information Technology. Pages 1-13. 2022. (Q2, Scopus)
• Neelkamal, Sonal Yadav, Hemangee Kapoor, “i-MAX: Just-in-Time Wakeup of Maximally Gated Router for Power Efficient Multiple NoC,” 26th International Symposium on VLSI Design and Test (VDAT 2022), Springer, July 17-19, 2022.
• Sonal Yadav, Ritu Raj, “Power Efficient Network Selector Placement in Control Plane of Multiple NoC,” Journal of Supercomputig, Springer-Nature, 2021. https://doi.org/10.1007/s11227-021-04098-4 (Q2, SCI)
• Sonal Yadav, “Interconnect Paradigm Shift towards Networks-on-Chip in Manycore Processors: A Review on Challenges,” 6th International Conference on Soft Computing: Theories and Applications (SoCTA), Lecture Notes in Networks and Systems (LNNS) Springer, Dec 17-19, 2021. 
• Sonal Yadav, “A Study on Requests Serialization in Directory-Based Protocol for MESI Cache Coherence Protocol,” 6th International Conference on Soft Computing: Theories and Applications (SoCTA), Lecture Notes in Networks and Systems (LNNS) Springer, Dec 17-19, 2021. 
• Sonal Yadav, Vijay Laxmi and Manoj Singh Gaur, “Multiple-NoC Exploration and Customization for Energy Efficient Traffic Distribution,” 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC), Salt Lake City, UT, USA, 2020 (h5-index: 12)
• Neelkamal, Sonal Yadav, and Hemangee K. Kapoor, “Lightweight Message Encoding of Power-Gating Controller for On-Time Wakeup of Gated Router in Network-on-Chip,” in Ninth International Symposium on EmbeddedComputing and System Design (ISED), IEEE, Kerala, IN, December 2019.
• Sonal Yadav, Vijay Laxmi, Manoj Singh Gaur, and Hemangee K. Kapoor, “Improving Static Power Efficiency via Placement of Network Demultiplexer over Control Plane of Router in Multi-NoCs,” in Proc. of Fifty-Sixth Int. Conf. Design Automation Conference (DAC), ACM/EDAC/IEEE, Las Vegas, NV, US, June 2-6 2019. (Core Rank: A*)
• Sonal Yadav, Vijay Laxmi, Manoj Singh Gaur, Hemangee K. Kapoor, and Mark Zwolinski, “A power efficient crossbar arbitration in Multi-NoC for Multicast and Broadcast Traffic,” in Proc. of Int. Conf. on IEEE International Symposium on Smart Electronic Systems (IEEE-iSES), IEEE, Hyderabad, IN, Dec 2018. (Best Paper Award)
• Ashish Sharma, Yogendra Gupta, Sonal Yadav, Lava Bhargava, Manoj Singh Gaur, Vijay Laxmi, “A Power, Thermal and Reliability-Aware Network-on-Chip”, IEEE International Symposium on Nanoelectronic and Information Systems (IEEE-iNIS), Bhopal, December 2017.
• Sonal Yadav, Vijay Laxmi, and Manoj Singh Gaur, “A Power Efficient Dual Link Mesh NOC Architecture to Support Nonuniform Traffic Arbitration at Routing Logic,” in Proceedings of the Twenty-Ninth International Conference on VLSI Design (VLSID), IEEE, Kolkata, pp. 69-74, Jan. 4-8, 2016. (Core Rank: Indian 5-star)
• Sonal Yadav, Vijay Laxmi, Manoj Singh Gaur and Megha Bhargava, “C²-DLM: Cache Coherence aware Dual Link Mesh for On-chip Interconnect,” in Proc. 19th IEEE International Symposium on VLSI Design and Test, Ahmedabad,2015.
• Sonal Yadav, Manoj Singh Gaur, Vijay Laxmi, S. Sharma, “Fault tolerant adaptive XY routing for HPC mesh,” in Proc. of 9th IEEE International Conference on Industrial and Information Systems (ICIIS), Gwalior, pp. 1-6, 2014.
• Sonal Yadav, Manoj Singh Gaur, Vijay Laxmi, and Megha Bhargava, “Dynamic fault injection model for on-chip 2D mesh network,” in Proc. of the 7th ACM Computing Conference (COMPUTE ’14). ACM, New York, NY, USA, Article 18, 6 pages.
• Sonal Yadav, Manoj Singh Gaur, and Vijay Laxmi, “Ns-3 emulation on ORBIT testbed,” in International Conference on Advances in Computing, Communications and Informatics (ICACCI), IEEE, pp. 616-619, August 22-25,2013.
• Sonal Yadav, Manoj Singh Gaur, and Vijay Laxmi, "Energy Scavenging Based HybridGSM Model for Mobile Towers," Recent Advances in Intelligent Informatics. Pages 343-349, Springer Nature, 2014. DOI: 10.1007/978-3-319-01778-5
• Sonal Yadav, “Tool Chain for Performance Analysis of Chip-Multiprocessor,” 29th National Convention of Computer Engineers and National Seminar on ETICE-2015, Organized by IET and SKIT Jaipur, India. February 7-8, 2015.
• Sonal Yadav, “NS-3 Emulation on ORBIT Testbed,” 27th National Convention and National Seminar on Latest Advancements in Computer Engineering (LACE’ 13) , Organized by IET and MNIT Jaipur, India. February 4-5, 2013.